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FEATURES Low Offset Voltage: 100 V max Low Drift: 2 V/ C max Wide Gain Range 1 to 10,000 High Common-Mode Rejection: 115 dB min High Bandwidth (G = 1000): 200 kHz typ Gain Equation Accuracy: 0.5% max Single Resistor Gain Set Input Overvoltage Protection Low Cost Available In Die Form APPLICATIONS Differential Amplifier Strain Gauge Amplifier Thermocouple Amplifier RTD Amplifier Programmable Gain Instrumentation Amplifier Medical Instrumentation Data Acquisition Systems
High Accuracy 8-Pin Instrumentation Amplifier AMP02
PIN CONNECTIONS Epoxy Mini-DIP 16-Pin SOL (P Suffix) (S Suffix) and Cerdip (Z Suffix)
NC = NO CONNECT
GENERAL DESCRIPTION
The AMP02 is the first precision instrumentation amplifier available in an 8-pin package. Gain of the AMP02 is set by a single external resistor, and can range from 1 to 10,000. No gain set resistor is required for unity gain. The AMP02 includes an input protection network that allows the inputs to be taken 60 V beyond either supply rail without damaging the device. Laser trimming reduces the input offset voltage to under 100 V. Output offset voltage is below 4 mV and gain accuracy is better than 0.5% for gain of 1000. PMI's proprietary thin-film resistor process keeps the gain temperature coefficient under 50 ppm/C. Due to the AMP02's design, its bandwidth remains very high over a wide range of gain. Slew rate is over 4 V/s making the AMP02 ideal for fast data acquisition systems.
Figure 1. Basic Circuit Connections
A reference pin is provided to allow the output to be referenced to an external dc level. This pin may be used for offset correction or level shifting as required. In the 8-pin package, sense is internally connected to the output. For an instrumentation amplifier with the highest precision, consult the AMP01 data sheet. For the highest input impedance and speed, consult the AMP05 data sheet.
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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AMP02-SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V =
S
15 V, VCM = 0 V, TA = +25 C, unless otherwise noted.)
Min AMP02E Typ Max 20 50 0.5 1 4 50 115 100 80 110 95 75 125 110 90 120 110 90 2 150 1.2 9 10 16.5 120 115 95 120 110 90 0.50 0.30 0.25 0.02 10k 0.006 20 12 11 13 12 22 32 50 12 11 10 5 100 200 2 4 10 100 110 95 75 105 90 70 Min AMP02F Typ 40 100 1 2 9 100 115 100 80 110 95 75 4 250 2 15 10 16.5 115 110 90 115 105 85 0.70 0.50 0.40 0.05 10k 0.006 20 13 12 22 32 50 20 10 Max 200 350 4 8 20 200 Units V V V/C mV mV V/C dB dB dB dB dB dB nA pA/C nA pA/C G G V dB dB dB dB dB dB % % % % V/V % ppm/C V V mA mA
Parameter OFFSET VOLTAGE Input Offset Voltage Input Offset Voltage Drift Output Offset Voltage
Symbol VIOS TCVIOS VOOS
Conditions TA = +25C -40C TA +85C -40C TA +85C TA = +25C -40C TA +85C -40C TA +85C VS = 4.8 V to 18 V G = 100, 1000 G = 10 G=1 VS = 4.8 V to 18 V -40C TA +85C G = 1000, 100 G = 10 G=1 TA = +25C -40C TA +85C TA = +25C -40C TA +85C Differential, G 1000 Common-Mode, G = 1000 TA = +25C (Note 1) VCM = 11 V G = 1000, 100 G = 10 G=1 VCM = 11 V -40C TA +85C G = 100, 1000 G = 10 G=1 G = 1000 G = 100 G = 10 G=1
Output Offset Voltage Drift TCVOOS Power Supply Rejection PSR
INPUT CURRENT Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift INPUT Input Resistance Input Voltage Range Common-Mode Rejection
IB TCIB IOS TCIOS RIN IVR CMR
11 115 100 80 110 95 75
11 110 95 75 105 90 70
GAIN Gain Equation Accuracy Gain Range Nonlinearity Temperature Coefficient OUTPUT RATING Output Voltage Swing Positive Current Limit Negative Current Limit NOISE Voltage Density, RTI
G = 50 k +1 RG G GTC VOUT
1 G = 1 to 1000 1 G 1000 (Notes 2, 3) TA = +25C, RL = 1 k RL = 1 k, -40C TA +85C Output-to-Ground Short Output-to-Ground Short fO = 1 kHz G = 1000 G = 100 G = 10 G=1 fO = 1 kHz, G = 1000 0.1 Hz to 10 Hz G = 1000 G = 100 G = 10 G=1 G = 10 G = 10, RL = 1 k To 0.01% 10 V Step G = 1 to 1000 4
1
en
Noise Current Density, RTI in Input Noise Voltage en p-p
9 10 18 120 0.4 0.4 0.5 1.2 1200 300 200 6 10 25 11 50 11 1
9 10 18 120 0.4 0.4 0.5 1.2 1200 300 200 6 10 25 11 50 11 1
nV/Hz nV/Hz nV/Hz nV/Hz pA/Hz V p-p V p-p V p-p kHz kHz kHz V/s s k V k V V/V
DYNAMIC RESPONSE Small-Signal Bandwidth (-3 dB) G = 100, 1000 Slew Rate Settling Time SENSE INPUT Input Resistance Voltage Range REFERENCE INPUT Input Resistance Voltage Range Gain to Output
BW SR tS
4
RIN
RIN
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Parameter POWER SUPPLY Supply Voltage Range Supply Current Symbol VS ISY Conditions Min 4.5 TA = +25C -40C TA +85C 5 5 AMP02E Typ Max 18 6 6 Min 4.5 5 5 AMP02F Typ Max 18 6 6 Units V mA mA
NOTES 1 Input voltage range guaranteed by common-mode rejection test. 2 Guaranteed by design. 3 Gain tempco does not include the effects of external component drift. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
Package Type 8-Pin Plastic DIP (P) 16-Pin SOL (S)
JA
2
JC
Units C/W C/W
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Common-Mode Input Voltage . [(V-) - 60 V] to [(V+) + 60 V] Differential Input Voltage . . . . [(V-) - 60 V] to [(V+) + 60 V] Output Short-Circuit Duration . . . . . . . . . . . . . . .Continuous Operating Temperature Range . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Function Temperature Range . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300C
96 92
37 27
NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 JA is specified for worst case mounting conditions, i.e., JA is specified for device in socket for P-DIP package; JA is specified for device soldered to printed circuit board for SOL package.
ORDERING GUIDE
Model AMP02EP AMP02FP AMP02AZ/883C AMP02FS AMP02GBC AMP02FS-REEL VIOS max @ VOOS max @ Temperature TA = +25 C TA = +25 C Range 100 V 200 V 200 V 200 V 200 V 4 mV 8 mV 10 mV 8 mV 8 mV -40C to +85C -40C to +85C -55C to +125C -40C to +85C -40C to +85C Package Description 8-Pin Plastic DIP 8-Pin Plastic DIP 8-Pin Cerdip 16-Pin SOIC Die 16-Pin SOIC
Figure 2. Simplified Schematic
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AMP02
1. RG1 2. -IN 3. +IN 4. V- 5. REFERENCE 6. OUT 7. V+ 8. RG2 9. SENSE CONNECT SUBSTRATE TO V-
DIE SIZE 0.103 X 0.116 inch, 11,948 sq. mils (2.62 X 2.95 mm, 7.73 sq. mm)
Dice Characteristics
WAFER TEST LIMITS at V =
S
15 V, VCM = 0 V, TA = +25 C, unless otherwise noted.
Conditions AMP02 GBC Limits 200 8 VS = 4.8 V to 18 V G = 1000 G = 100 G = 10 G=1 110 110 95 75 20 10 Guaranteed by CMR Tests VCM = 11 V G = 1000 G = 100 G = 10 G=1
G= 50 k + 1, G = 1000 RG
Parameter Input Offset Voltage Output Offset Voltage
Symbol VIOS VOOS
Units V max mV max
Power Supply Rejection Input Bias Current Input Offset Current Input Voltage Range
PSR
dB min
IB IOS IVR
nA max nA max V min
11 110 110 95 75 0.7 12 6
Common-Mode Rejection
CMR
dB min
Gain Equation Accuracy Output Voltage Swing Supply Current VOUT ISY
% max V min mA max
RL = 1 k
NOTE Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AMP02 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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Typical Performance Characteristics-AMP02
Figure 3. Typical Distribution of Input Offset Voltage
Figure 4. Typical Distribution of TCVIOS
Figure 5. Input Offset Voltage Change vs. Supply Voltage
Figure 6. Typical Distribution of Output Offset Voltage
Figure 7. Typical Distribution of TCVOOS
Figure 8. Output Offset Voltage Change vs. Supply Voltage
Figure 9. Input Offset Current vs. Temperature
Figure 10. Input Bias Current vs. Temperature
Figure 11. Input Bias Current vs. Supply Voltage
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AMP02
Figure 12. Closed-Loop Voltage Gain vs. Frequency
Figure 13. Common-Mode Rejection vs. Frequency
Figure 14. Common-Mode Rejection vs. Voltage Gain
Figure 15. Positive PSR vs. Frequency
Figure 16. Negative PSR vs. Frequency
Figure 17. Total Harmonic Distortion vs. Frequency
Figure 18. Voltage Noise Density vs. Frequency
Figure 19. RTI Voltage Noise Density vs. Gain
Figure 20. 0.1 Hz to 10 Hz Noise AV = 1000
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AMP02
Figure 21. Maximum Output Swing vs. Frequency
Figure 22. Maximum Output Voltage vs. Load Resistance
Figure 23. Closed Loop Output Impedance vs. Frequency
Figure 24. Supply Current vs. Supply Voltage
Figure 25. Slew Rate vs. Voltage Gain
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AMP02
APPLICATIONS INFORMATION
INPUT AND OUTPUT OFFSET VOLTAGES
Instrumentation amplifiers have independent offset voltages associated with the input and output stages. The input offset component is directly multiplied by the amplifier gain, whereas output offset is independent of gain. Therefore, at low gain, output-offset-errors dominate, while at high gain, input-offseterrors dominate. Overall offset voltage, VOS, referred to the output (RTO) is calculated as follows: VOS (RTO) = (VIOS G) + VOOS where VIOS and VOOS are the input and output offset voltage specifications and G is the amplifier gain. The overall offset voltage drift TCVOS, referred to the output, is a combination of input and output drift specifications. Input offset voltage drift is multiplied by the amplifier gain, G, and summed with the output offset drift: TCVOS (RTO) = (TCVIOS G) + TCVOOS where TCVIOS is the input offset voltage drift, and TCVOOS is the output offset voltage drift. Frequently, the amplifier drift is referred back to the input (RTI) which is then equivalent to an input signal change: TCVOS (RTI) =TCVIOS +
TCV OOS G
The voltage gain can range from 1 to 10,000. A gain set resistor is not required for unity-gain applications. Metal-film or wirewound resistors are recommended for best results. The total gain accuracy of the AMP02 is determined by the tolerance of the external gain set resistor, RG, combined with the gain equation accuracy of the AMP02. Total gain drift combines the mismatch of the external gain set resistor drift with that of the internal resistors (20 ppm/C typ). Maximum gain drift of the AMP02 independent of the external gain set resistor is 50 ppm/C. All instrumentation amplifiers require attention to layout so thermocouple effects are minimized. Thermocouples formed between copper and dissimilar metals can easily destroy the TCVOS performance of the AMP02 which is typically 0.5 V/C. Resistors themselves can generate thermoelectric EMFs when mounted parallel to a thermal gradient. The AMP02 uses the triple op amp instrumentation amplifier configuration with the input stage consisting of two transimpedance amplifiers followed by a unity-gain differential amplifier. The input stage and output buffer are laser-trimmed to increase gain accuracy. The AMP02 maintains wide bandwidth at all gains as shown in Figure 26. For voltage gains greater than 10, the bandwidth is over 200 kHz. At unity-gain, the bandwidth of the AMP02 exceeds 1 MHz.
For example, the maximum input-referred drift of an AMP02EP set to G = 1000 becomes: TCVOS (RTI) = 2 V/C +
100 V /C = 2.1 V/C 1000
INPUT BIAS AND OFFSET CURRENTS
Input transistor bias currents are additional error sources which can degrade the input signal. Bias currents flowing through the signal source resistance appear as an additional offset voltage. Equal source resistance on both inputs of an IA will minimize offset changes due to bias current variations with signal voltage and temperature. However, the difference between the two bias currents, the input offset current, produces an error. The magnitude of the error is the offset current times the source resistance. A current path must always be provided between the differential inputs and analog ground to ensure correct amplifier operation. Floating inputs, such as thermocouples, should be grounded close to the signal source for best common-mode rejection.
GAIN
Figure 26. The AMP02 Keeps Its Bandwidth at High Gains
COMMON-MODE REJECTION
The AMP02 only requires a single external resistor to set the voltage gain. The voltage gain, G, is:
G= 50 k +1 RG
and RG =
50 k G -1
Ideally, an instrumentation amplifier responds only to the difference between the two input signals and rejects common-mode voltages and noise. In practice, there is a small change in output voltage when both inputs experience the same common-mode voltage change; the ratio of these voltages is called the commonmode gain. Common-mode rejection (CMR) is the logarithm of the ratio of differential-mode gain to common-mode gain, expressed in dB. Laser trimming is used to achieve the high CMR of the AMP02.
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AMP02
Figure 27. Triple Op Amp Topology of the AMP02
Figure 27 shows the triple op amp configuration of the AMP02. With all instrumentation amplifiers of this type, it is critical not to exceed the dynamic range of the input amplifiers. The amplified differential input signal and the input common-mode voltage must not force the amplifier's output voltage beyond 12 V (VS = 15 V) or nonlinear operation will result. The input stage amplifier's output voltages at V, and V2 equals:
2R V D V1 = - 1+ R 2 +V CM G
VD +V CM = -G 2
GROUNDING
The majority of instruments and data acquisition systems the separate grounds for analog and digital signals. Analog ground may also be divided into two or more grounds which will be tied together at one point, usually the analog power-supply ground. In addition, the digital and analog grounds may be joined, normally at the analog ground pin on the A to D converter. Follow this basic practice is essential for good circuit performance. Mixing grounds causes interactions between digital circuits and the analog signals. Since the ground returns have finite resistance and inductance, hundreds of millivolts can be develop between the system ground and the data acquisition components. Using separate ground returns minimizes the current flow in the sensitive analog return path to the system ground point. Consequently, noisy ground currents from logic gates do interact with the analog signals. Inevitably, two or more circuits will be joined together with their grounds at differential potentials. In these situations, the differential input of an instrumentation amplifier, with its high CMR, can accurately transfer analog information from one circuit to another.
SENSE AND REFERENCE TERMINALS
2R V D V2 = 1+ R 2 +V CM G
V = G D +V CM 2
where VD = Differential input voltage = (+IN) - (-IN) VCM = Common-mode input voltage G = Gain of instrumentation amplifier If V1 and V2 can equal 12 V maximum, then the common-mode input voltage range is: CMVR = 12V -
GV D 2
The sense terminal completes the feedback path for the instrumentation amplifier output stage and is internally connected directly to the output. For SOL devices, connect the sense terminal to the output. The output signal is specified with respect to the reference terminal, which is normally connected to analog ground. The reference may also be used for offset correction level shifting. A reference source resistance will reduce the common-mode rejection by the ratio of 25 k/RREF. If the reference source resistance is 1 , then the CMR will be reduced 88 dB (25 k/1 = 88 dB).
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AMP02
OVERVOLTAGE PROTECTION POWER SUPPLY CONSIDERATIONS
Instrumentation amplifiers invariably sit at the front end of instrumentation systems where there is a high probability of exposure to overloads. Voltage transients, failure of a transducer, or removal of the amplifier power supply while the signal source is connected may destroy or degrade the performance of an unprotected device. A common technique used is to place limiting resistors in series with each input, but this adds noise. The AMP02 includes internal protection circuitry that limits the input current to 4 mA for a 60 V differential overload (see Figure 28) with power off, 2.5 mA with power on.
Achieving the rated performance of precision amplifiers in a practical circuit requires careful attention to external influences. For example, supply noise and changes in the nominal voltage directly affect the input offset voltage. A PSR of 80 dB means that a change of 100 mV on the supply, not an uncommon value, will produce a 10 V input offset change. Consequently, care should be taken in choosing a power unit that has a low output noise level, good line and load regulation, and good temperature stability. In addition, each power supply should be properly bypassed.
Figure 28. AMP02's Input Protection Circuitry Limits Input Current During Overvoltage Conditions
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AMP02
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Mini-Dip (N-8) Package
0.430 (10.92) 0.348 (8.84)
8 5
0.280 (7.11) 0.240 (6.10)
1 4
PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93)
0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN SEATING PLANE
0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)
0.022 (0.558) 0.100 0.070 (1.77) 0.014 (0.356) (2.54) 0.045 (1.15) BSC
0.015 (0.381) 0.008 (0.204)
Cerdip (Q-8) Package
0.005 (0.13) MIN
8
0.055 (1.4) MAX
5
0.310 (7.87) 0.220 (5.59)
1 4
PIN 1 0.405 (10.29) MAX 0.200 (5.08) MAX 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING PLANE 15 0
0.320 (8.13) 0.290 (7.37)
0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.100 0.070 (1.78) 0.014 (0.36) (2.54) 0.030 (0.76) BSC
0.015 (0.38) 0.008 (0.20)
SOL (R-16) Package
0.4133 (10.50) 0.3977 (10.00)
16 9
1
8
PIN 1 0.0118 (0.30) 0.0040 (0.10)
0.1043 (2.65) 0.0926 (2.35)
0.4193 (10.65) 0.3937 (10.00)
0.2992 (7.60) 0.2914 (7.40)
0.0291 (0.74) x 45 0.0098 (0.25)
0.0500 (1.27) BSC
8 0.0192 (0.49) 0 SEATING 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
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PRINTED IN U.S.A.

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